CPU Technology has introduced the Acalis CPU872 secure processor for commercial and military systems.
The unit offers advanced anti-tamper technology and complies with stringent US DoD (Department of Defense) requirements.
'Experience has shown that software alone can't protect itself - the bad actors will always be one step ahead. For example, the National Institute of Standards and Technology's (NIST) Advanced Encryption Standard (AES) algorithm in widespread use has been certified by the National Security Agency (NSA) for protection of even top secret information,' a CPU Tech spokesperson told IT Examiner.
'However, implementations of the algorithms are often flawed. Popular PC disk encryption programs can be cracked by recovering the AES key from the CPU's dynamic RAM by cooling the DRAM to prolong its data retention time, recovering partially decayed remnants, then searching to find the AES key in the memory image.'
The spokesperson also emphasised that ensuring the absence of a Trojan Horse during design or production was absolutely 'critical' to ensure secure processing.
'This malicious circuit can be inserted into the chip during design or fabrication. The CPU872 was designed using CPU Tech and IBM trusted tools. It was fabricated at IBM's East Fishkill Trusted Foundry under the auspices of the DoD / NSA sponsored Trusted Access Program (TAPO) – the best protection available against Trojan Horses in component design,' explained the spokesperson.
'Acalis programmes are securely booted from encrypted Flash files into on-chip embedded DRAM. In sensitive applications all off-chip programmes and data are encrypted. The process of using an encryption key often creates vulnerability for the key itself.'
In addition to supporting encryption algorithms such as AES, the CPU872 features an Advanced Encryption Cipher (AEC). IO traffic between the CPU872 and other components is protected via a secure proprietary protocol. One of the two Acalis processors (CPU A) can be opened to run non-trusted code and support standard Ethernet IO by optionally raising an on-chip hardware firewall to isolate CPU A from CPU B. In this mode, the only communication between CPU A and CPU B is through a hardware mailbox system.
The Acalis CPU872 comprises two complete PowerPC 440 subsystems, each including a 4MB on-chip eDRAM to maximise security. The processors communicate securely with each other as well as directly with other CPU872 components via a high performance, low latency system. X
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